Memories are known in the form of various embodiments, such as DRAMs, SRAMs, in particular Double Data Rate DRAMs. The memories have input/output circuits which are connected to input registers and output registers. The input registers are used to make data available to the input/output circuit for writing to the memory cells. The output registers are used to output data from the input/output circuit. The input and output registers output data via data outputs of the memory or receive data via the data inputs of the memory. The input and output registers can be operated with different data widths and at different clock rates than the input/output circuit when writing or reading data.
To test the operability of the memories, it may be necessary to introduce test data into the memory's data stream. To this end, it is known practice to connect external testers to the data inputs and to the data outputs of the memory.
For testing a separate test pattern generator may be connected to the data path of the input/output circuit via a data multiplexer. On account of the high data rate, however, there may be the risk that time delays and impairment of the data signal will be caused by the arrangement of the multiplexer. In addition, it is a complex matter to distribute the test data from the test pattern generator over the data inputs of the memory.